Process for manufacturing a semiconductor device

ABSTRACT

There is disclosed a process for manufacturing a semiconductor device. When a metal film is formed by plasma CVD in a contact hole which penetrates an interlayer insulating film and reaches an electrode of the device, a gas comprising hydrogen and argon in a deposition chamber of a plasma CVD apparatus is introduced. Then a metal halide gas is introduced in the deposition chamber simultaneously with or before plasma generation.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] This invention relates to a process for manufacturing asemiconductor device. In particular, it relates to a process for forminga contact for electrically connecting a device with a wiring.

[0003] 2. Description of the Related Art

[0004] For electrically connecting an MOSFET device with another deviceor an external electric terminal, on a semiconductor substrate is formedan MOSFET, on which is formed an interlayer insulating film; then acontact hole is opened in the interlayer insulating film to expose thesource, the drain and the gate electrodes of the MOSFET; and the openingis filled with a conductive material to form a contact, on which wiringsare then formed.

[0005]FIGS. 8 and 9 show an example of the process. FIG. 8 is across-section along the channel in the MOSFET structure. FIG. 9 is across-section along the direction perpendicular to the channel in FIG.8.

[0006] As shown in FIGS. 8(a) and 9(a), an MOSFET device comprising agate oxide film 303, a polycide structure of gate electrode 304consisting of a polysilicon film 305 and a tungsten-silicide film 306, asidewall 308 on the sidewall of the gate electrode, and a source-drainregion 307 is formed on a device region of a p-type silicon substrate301 which is delimited by a device-separating silicon oxide film 302.

[0007] As shown in FIGS. 8(b) and 9(b), a BPSG film 309 is formed as aninterlayer insulating film and then contact holes 311 reaching thesource-drain region 307 and the gate electrode 304 are formed. As seenin the cross section of FIG. 9(b), the contact hole is formed over anbrig-out area rather than just over the channel for the gate electrode.

[0008] As shown in FIGS. 8(c) and 9(c), a titanium film 312 is formed onthe BPSG film surface including the sidewall of the contact holes, onthe source-drain region and the gate electrode each exposed in thecontact holes. In the process, silicon reacts with titanium on thesurfaces of the source-drain region and the gate electrode to form atitanium silicide film 313, which contributes to decrease contactresistance with the contact plug.

[0009] As shown in FIGS. 8(d) and 9(d), a titanium nitride film 314 isformed by thermal CVD on the whole surface, filling at least the contactholes. The titanium nitride film is etched back to form plugs, leavingthe film only in the contact holes 311. An aluminum-alloy film is formedand then patterned by etching to form upper wirings 315 shown in FIGS.8(e) and 9(e). The source-drain region and the gate electrode of theMOSFET are connected to another device or an external terminal via theupper wirings 315.

[0010] In the process for manufacturing a semiconductor device, thetitanium film shown in FIG. 8(c) or 9(c) is formed by plasma CVD becauseof the following reasons. For example, spattering cannot form an evenfilm both on the bottom and the sidewall of the contact holes.Furthermore, when TiCl₄ and H₂ are used as reactants, thermal CVDrequires a higher substrate temperature of 1000° C. while plasma CVDrequires about 600° C.

[0011] In conventional plasma CVD, RF power is applied in a chamber inwhich Ar and H₂ gases have been introduced, to generate plasma. Afterthe plasma almost becomes stable, e.g. after 1 to 5 sec, introduction ofTiCl₄ gas is initiated to form a titanium film.

[0012] The process, however, has a problem that when generating plasmafrom Ar and H₂ charge is accumulated on an interlayer insulating filmsuch as the BPSG film 309 as shown in FIG. 10 and may cause a largepotential difference between the gate electrode 304 and the siliconsubstrate 301, leading to electric breakdown in the gate oxide film 303.Particularly, as a device has been miniaturized, a gate oxide film hasbecome thinner and the antenna ratio of the gate electrode, i.e., theratio defined by dividing the total area of the gate electrode by thearea of the gate electrode over the channel region, has been increased,more frequently causing electric breakdown in the gate oxide film. Forexample, electric breakdown during plasma CVD is negligible for a gateoxide film 150 Å in thickness while eminent at about 100 Å. Furthermore,as the aspect ratio (i.e., depth/diameter) of the contact hole becomeslarger, charge imbalance referred to as a shading effect becomes moreeminent as shown in FIG. 10, more frequently causing electric breakdownin the gate oxide film.

SUMMARY OF THE INVENTION

[0013] In the light of these problems, an objective of this invention isto provide a process for manufacturing a semiconductor device where evenfor a high-density and highly-integrated device, a gate oxide film isnot damaged during forming a metal film in a contact hole by plasma CVD,and a plasma CVD apparatus used therefor.

[0014] This invention provides a process for manufacturing asemiconductor device comprising the step of forming a metal film byplasma CVD in a contact hole which penetrates an interlayer insulatingfilm covering a given device formed on a semiconductor substrate andwhich reaches an electrode of the device, wherein the metal film isformed in the contact hole by introducing a gas comprising hydrogen andargon in a deposition chamber of a plasma CVD apparatus and thenintroducing a metal halide gas in the deposition chamber simultaneouslywith or before plasma generation.

[0015] This invention also provides a plasma CVD apparatus for themanufacturing process for a semiconductor device, comprising asynchronization/delay mechanism whereby the metal halide gas isintroduced simultaneously with or before turning RF power on for plasmageneration.

BRIEF DESCRIPTION OF THE DRAWINGS

[0016]FIG. 1 is a process cross-section showing a process formanufacturing a semiconductor device according to this invention.

[0017]FIG. 2 shows timing for gas introduction and turning RF power onin the manufacturing process of this invention.

[0018]FIG. 3 is a graph showing leakage current properties for MOSFETsprepared by introducing TiCl₄ 15 sec. before plasma ignition.

[0019]FIG. 4 is a graph showing leakage current properties for MOSFETsprepared by introducing TiCl₄ 5 sec. before plasma ignition.

[0020]FIG. 5 is a graph showing leakage current properties for MOSFETsprepared by introducing TiCl₄ simultaneously with plasma ignition.

[0021]FIG. 6 is a graph showing leakage current properties for MOSFETsprepared by introducing TiCl₄ 5 sec. after plasma ignition.

[0022]FIG. 7 is a graph showing leakage current properties for MOSFETsprepared by introducing TiCl₄ 15 sec. after plasma ignition.

[0023]FIG. 8 is a process cross-section showing a process formanufacturing a semiconductor device according to the prior art.

[0024]FIG. 9 is a process cross-section showing a process formanufacturing a semiconductor device according to the prior art.

[0025]FIG. 10 shows charge accumulation in the manufacturing process ofthe prior art.

[0026] In figs.;

[0027]101: p-Type silicon substrate

[0028]102: Device-separating silicon oxide film

[0029]103: Gate oxide film

[0030]104: Gate electrode

[0031]105: Polysilicon film

[0032]106: Tungsten silicide film

[0033]109: BPSG film

[0034]111: Contact hole

[0035]112: Titanium film

[0036]113: Titanium silicide film

[0037]114: Titanium nitride film

[0038]115: Upper wirings

[0039]301: p-Type silicon substrate

[0040]302: Device-separating silicon oxide film

[0041]303: Gate oxide film

[0042]304: Gate electrode

[0043]305: Polysilicon film

[0044]306: Tungsten silicide film

[0045]307: Source-drain region

[0046]308: Sidewall

[0047]309: BPSG film

[0048]311: Contact hole

[0049]312: Titanium film

[0050]313: Titanium silicide film

[0051]314: Titanium nitride film

[0052]315: Upper wirings

DETAILED DESCRIPTION OF THE INVENTION

[0053] According to this invention, a metal halide is introduced in adeposition chamber before plasma generation to prevent charge from beingaccumulated on a device electrode. Therefore, even for a device in whicha device electrode is adjacent to a thin insulating film, electricbreakdown does not occur in the insulating film and thus deviceproperties are not deteriorated. We assume for the reason of the effectthat presence of the metal halide gas in the system may allow the metalfilm to be formed on the insulating film immediately after plasmageneration and thus charge generated due to the plasma may be dispersedor neutralized adequately quickly to prevent charge accumulation.

[0054] Furthermore, instability in plasma immediately after turning RFpower on did not affect practical deposition performance at all.

[0055] In the process of this invention, whether the metal halide gas isintroduced simultaneously with or before plasma generation, anacceptable device can be practically manufactured. However, in the lightof margins in RF power etc., it is preferably introduced before plasmageneration; for example, before at least 1 sec. It is not necessary tointroduce the metal halide gas too earlier than plasma generation.Generally, a metal halide gas such as TiCl₄ is highly corrosive, and itis, therefore, preferable to avoid exposing a hot substrate or aretainer holding the substrate to the gas for a long time. Thus, in thelight of durability of the apparatus, introduction of the metal halidegas may be set to generally up to 15 sec., preferably up to 5 sec.before turning RF power on for plasma ignition.

[0056] Although introduction of a metal halide gas and plasma ignition(RF power ON) may be manually controlled by an operator, the plasma CVDapparatus of this invention may be used for automatically turning RFpower on after a predetermined period from metal-halide gas introduction(including simultaneous power ON). Such automatic time setting may avoidexcessive presence of the metal halide gas in the absence of plasma. Asynchronization/delay circuit for the apparatus may be, but not limitedto, one where RF power switch is interlocked with a switching valve forintroducing the metal halide gas. The CVD apparatus may be suitable formass production.

[0057] A metal film deposited according to this invention is preferablymade of a high melting point metal, preferably titanium, tungsten andtantalum. Metal halide gases which may be used include halides of theabove metals, preferably chlorides and iodides TiCl₄ and TiI₄ arepreferable for depositing a titanium metal film.

[0058] This invention may be suitably applied a device comprising a thininsulating film in contact with an electrode such as an MOSFET. Inparticular, this invention may be effectively applied in the step offorming a metal film in a contact hole reaching a gate electrode. Thisinvention is significantly effective when the thickness of the gateinsulating film is less than 150 Å, preferably equal to 120 Å or less,more preferably equal to 100 Å or less. The antenna ratio of the gateelectrode is preferably equal to 100 or larger.

[0059] This invention is particularly effective when the aspect ratio ofthe contact hole is equal to 6 or larger.

[0060] An embodiment of this invention will be specifically describedwith reference to FIG. 1 showing a cross section along a directionperpendicular to the channel. In the following description, a titaniumfilm is formed with TiCl₄ as a metal halide gas, but of course thisinvention is not limited to the particular gas.

[0061] As shown in FIG. 1(a), an MOSFET device comprising a gate oxidefilm 103 as a gate insulating film, a polycide structure of gateelectrode 104 consisting of a polysilicon film 105 and atungsten-silicide film 106, a sidewall (not shown) on the sidewall ofthe gate electrode, and a source-drain region was formed on a deviceregion of a p-type silicon substrate 101 which was delimited by adevice-separating silicon oxide film 102. The cross-section along thechannel indicates a similar structure to that shown in FIG. 8(a) withrespect to the prior art. The gate oxide film had a thickness of 50 Å.Various MOSFET structures were fabricated, varying the antenna ratiofrom 50 to 10000.

[0062] As shown in FIG. 1(b), a BSPG film 109 was formed as aninterlayer insulating film and then contact holes 111 reaching thesource-drain regions (not shown) and the gate electrode 104 were formed.The aspect ratio of the contact hole was about 8 for making thisinvention very effective.

[0063] As shown in FIG. 1(c), a titanium film 112 was formed on the BPSGfilm surface including the sidewall of the contact hole and on thesource-drain region and the gate electrode each exposed in the contactholes, by plasma CVD as described below.

[0064]FIG. 2 shows timing in plasma CVD according to this invention. Ina chamber of a plasma CVD apparatus were introduced hydrogen and argongases at 1500 sccm and 500 sccm, respectively. After the total pressurein the chamber reached 5 Torr, introduction of TiCl₄ gas was initiatedat 3.5 sccm (preferably equal to 1.5 sccm or more) and then RF power wasturned ON (RF power 250 W; preferably equal to 500 W or less) togenerate plasma. In the process of this invention, TiCl₄ gas isintroduced simultaneously with or before turning RF power on for plasmageneration. Specifically, in the process of this invention, whengenerating plasma, TiCl₄ has been introduced in the chamber of the CVDapparatus, and thus deposition of the titanium metal film is initiatedsimultaneously with plasma generation. For comparison, after introducinghydrogen and argon gases into the chamber, RF power was turned ON forplasma generation and then TiCl₄ was introduced.

[0065] A titanium film was deposited to a thickness of 100 Å on theinterlayer insulating film. In the process, silicon reacts with titaniumon the surfaces of the source-drain region and the gate electrode toform a titanium silicide film 113, which contributes to decrease thecontact resistance with the contact plug.

[0066] As shown in FIG. 1(d), a titanium nitride film 114 was formed bythermal CVD on the whole surface, filling at least the contact holes.The titanium nitride film was etched back to form a plug, leaving thefilm only in the contact holes 111. An aluminum-alloy film was formedand then patterned by etching to form upper wirings 115 shown in FIG.1(e). The source-drain region and the gate electrode of the MOSFET willbe connected to another device or an external terminal via the upperwirings 115.

[0067] FIGS. 3 to 7 show properties for MOSFETs fabricated varyingtiming of TiCl₄ introduction according to the above process. Asdescribed above, the thickness of the gate oxide film was 50 Å. As theinitial withstand-voltage test, a leakage current was determined when avoltage of 5 V was applied between the gate electrode and the siliconsubstrate for different MOSFETs. In these graphs, the abscissa and theordinate are a leakage current and a cumulative frequency, respectively.The more damaged the titanium film is by plasma during deposition, thehigher a probability for an FET device with a high leakage currentbecomes.

[0068] As seen in the graphs, when TiCl₄ was introduced 15 sec. (FIG. 3)or 5 sec. (FIG. 4) before plasma ignition, a leakage current was lessthan 10⁻¹⁰ A for any antenna ratio from 50 to 10000. When TiCl₄ wasintroduced simultaneously with plasma ignition (FIG. 5), there werefound some devices exhibiting deteriorated properties for an antennaratio of 10000, while the probability was adequately low for a generallyemployed range of antenna ratio. In contrast, when TiCl₄ was introduced5 sec. (FIG. 6) or 15 sec. (FIG. 7) after plasma ignition, there weremany devices exhibiting deteriorated properties even for an antennaratio of 50.

[0069] As described above, an MOSFET exhibiting good properties withoutbreakdown of a gate oxide film can be provided by introducing TiCl₄ intoa CVD chamber simultaneously with or before plasma generation as in theprocess of this invention.

[0070] In conclusion, according to this invention, there can be provideda process for manufacturing a semiconductor device where even for ahigh-density and highly-integrated device, a gate oxide film is notdamaged during forming a metal film in a contact hole by plasma CVD, anda plasma CVD apparatus used therefor.

What is claimed is:
 1. A process for manufacturing a semiconductordevice comprising the step of forming a metal film by plasma CVD in acontact hole which penetrates an interlayer insulating film covering agiven device formed on a semiconductor substrate and which reaches anelectrode of the device, wherein; the metal film is formed in thecontact hole by introducing a gas comprising hydrogen and argon in adeposition chamber of a plasma CVD apparatus and then introducing ametal halide gas in the deposition chamber simultaneously with or beforeplasma generation.
 2. The process for manufacturing a semiconductordevice as claimed in claim 1 where the metal halide gas is introducedbefore plasma generation.
 3. The process for manufacturing asemiconductor device as claimed in claim 1 where the metal film is madeof a high melting point metal.
 4. The process for manufacturing asemiconductor device as claimed in claim 1 where the metal halide isselected from the group consisting of metal chlorides and iodides. 5.The process for manufacturing a semiconductor device as claimed in claim1 where the device comprises an MOSFET and the contact hole is forelectric connection with the gate electrode of the MOSFET.
 6. Theprocess for manufacturing a semiconductor device as claimed in claim 5where the gate insulating film of the MOSFET has a thickness of 100 Å orless.
 7. The process for manufacturing a semiconductor device as claimedin claim 5 where the antenna ratio of the gate electrode defined bydividing the total area of the gate electrode by the area of the channelregion) is equal to 100 or larger.
 8. The process for manufacturing asemiconductor device as claimed in claim 5 where the aspect ratio of thecontact hole is equal to 6 or larger.
 9. A plasma CVD apparatus for themanufacturing process for a semiconductor device as claimed in claim 1,comprising a synchronization/delay mechanism whereby the metal halidegas is introduced simultaneously with or before turning RF power on forplasma generation.